1. Technical Field of the Invention
The present invention relates to the field of switching power supplies, and in particular, to a switching power supply with digital feedback.
2. Description of the Related Art
Low voltage integrated circuitry has been improving over the years. Currently, low voltage integrated circuits operating in the three volt range are highly desirable. Such low voltage operation provides, among other benefits, low power consumption. Thus, in battery operated devices, such as portable telephones and lap-top computers, low voltage integrated circuitry allows the devices to operate proportionally longer than devices requiring higher voltage for operation.
In low voltage, low power applications, the source voltage is typically very small. Thus, power supply circuits have been developed to amplify the source voltage for switching applications.
While the power supply circuit provides an increased voltage to circuits that require increased voltage, the supplied voltage level varies depending on load variations and battery supply variations. Thus, it is important to regulate the output voltage of the power supply circuit.
Voltage regulators provide a predetermined and constant output voltage to a load from an unregulated and fluctuating input voltage source. One type of regulator is a switching regulator.
FIG. 1 is a schematic block diagram of a prior art switching regulator circuit 100. The switching regulator circuit 100 operates from an unregulated supply voltage VIN coupled to terminal 111, and is used to provide a regulated DC output voltage VOUT at terminal 109 (e.g., 5 volts) for driving load 103 which, for example, may be a portable or laptop computer or other battery-operated system. The switching regulator circuit 100 employs a power switch 101, such as a power metal oxide semiconductor field effect transistor (MOSFET), coupled in series or parallel with the load 103, a control circuit 105, and an output circuit 113.
In such a switching regulator circuit 100, the power MOSFET 101, is operated as a saturated switch to alternately supply current to output circuit 113 which includes inductor 115 and output capacitor 117. Output circuit 113 smooths the alternating supply of current so that load 103 is provided a regulated voltage VOUT.
In particular, the current through the inductor 115 builds up during each clock pulse CLK from a clock circuit (not shown), storing energy in its magnetic field. This stored energy is then transferred to filter capacitor 117 at the output, which also smooths the output.
Control circuit 105 monitors the output voltage VOUT to provide a feedback voltage VFB proportional to the output voltage VOUT. The control circuit 105 operates by regulating the feedback voltage VFB to be substantially equal to a reference voltage VREF provided by a reference circuit (not shown). With feedback voltage VFB being regulated, the output voltage VOUT is in turn regulated to a higher voltage.
The control circuit 105 controls the turning ON and turning OFF of the power MOSFET switch 101 in order to regulate the flow of power to the load 103. In particular, the control circuit 105 provides an OFF pulse of constant duration (e.g., 2 to 10 microseconds) during which time power MOSFET switch 101 is held OFF and an ON pulse during which time power MOSFET switch 101 is held ON. Therefore, the control circuit 113 alternately turns power MOSFET switch 101 ON and OFF to provide an alternating supply of current to output circuit 113.
The duty cycle of power MOSFET switch 101, which controls the flow of power to the load 103, can be varied by a variety of methods. For example, the duty cycle can be varied by either (1) fixing the pulse stream frequency and varying the ON or OFF time of each pulse, or (2) fixing the ON or OFF time of each pulse and varying the pulse stream frequency. Thus, power in the switching regulator circuit 100 is transmitted across the power MOSFET switch 101 in discrete current pulses.
The switching regulator circuit 100 controls the output by changing the pulse width or switching frequency. Switching frequency refers to the rate or interval at which the power MOSFET 101 is switched on or off. For example, if a transistor is switched on and off continuously at a 1 millisecond interval, it is said to have a 1 kHz switching rate.
During each switching interval, power is consumed by the switching device as a result of slew rate of the voltage and the current supplied to the switching device. This consumed power is dissipated in the form of losses in the switching device. The total power losses of a switching device consist of switching loss and conduction loss. The magnitude of the switching loss is a function of the switch and the amount of current (I) conducted through the switching device. The magnitude of the conduction loss is a function of the amount of current (I) passing through the switching device.
Power generated by such losses is absorbed by the switching device in the form of thermal energy, or heat, which typically increases the temperature of the switching device, and in turn must be dissipated from the switching device to the environment by heat transfer methods, such as radiation, convection and conduction.
One disadvantage of circuit 100 in FIG. 1 is that the switching regulator circuit 100 has a constant ripple current in inductor 115 (for constant voltage output VOUT), but has a frequency which varies with VIN. The ripple oscillation frequency is given by the equation: EQU fRIP=(1/tOFF)/[1-VOUT/VIN)]
This ripple oscillation frequency may decrease to an audible level with low input voltages VIN. This could occur, for example, when a battery powering the switching regulator circuit 100 is nearly discharged. Inductor 115 may then generate and emit noise that can be objectionable to a user of the device employing the switching regulator circuit 100.
A second disadvantage of switching regulator circuit 100 is that the efficiency is generally a function of output current and typically decreases at low output current. Therefore, although when the switching regulator circuit 100 is supplying close to the rated output current (e.g., when a disk or hard drive is ON in a portable or laptop computer), the efficiency of the overall circuit can be high. However, at low output current there is a reduction in efficiency which is generally attributable to the losses associated with operating the switching regulator circuit 100. For example, during the time the power MOSFET switch 101 is OFF, the current through inductor 115 always ramps down by the same amount regardless of the output current of the switching regulator circuit 100. At low output currents this can cause the current in inductor 115 to reverse polarity and, thus, pull power from the load 103. During the following ON cycle, this current again ramps positive such that the average inductor current equals the load current. Losses associated with this constant ripple current, along with switching losses due to the charging and discharging of the gate of power MOSFET switch 101, quiescent current losses in the control circuitry of the switching regulator circuit 100, switch driver current losses and inductor/transformer winding and core losses, can produce large reductions in efficiency at low output currents. The reduction in efficiency of the switching regulator circuit 100 at low output current can become important in battery-operated systems where maximizing battery lifetime is desirable.
A third disadvantage of switching regulator circuit 100 is that it can be damaged under extreme operating conditions. In particular, the power switch 101 can be damaged. Such conditions occur primarily in the event of short-circuits at the output and when turning the switching regulator circuit 100 ON.
A fourth disadvantage of the conventional switching regulator circuit 100 is that power MOSFET switch 101 must be very large so that when the switch is open, the resistance is close to zero (no DC loss). For example, the power MOSFET switch 101 has a ratio of channel width to channel length (W/L) of 5000/0.5. Therefore, a large capacitance is associated with the gate of the power MOSFET switch 101, which consumes a lot of power when switching the power MOSFET switch 101 ON and OFF, even if only a small pulse of current is needed to maintain the output voltage.
A fifth disadvantage of switching regulator circuit 100 is that it reacts too slowly and is not able to handle rapid changes, such as transients. Thus, the large transients associated with the switching operation can cause crosstalk problems if the switching regulator circuit 100 is to be integrated with other analog or digital components in a system on a chip configuration.
A schematic of another conventional switching voltage regulator circuit 200, is illustrated in FIG. 2 and U.S. Pat. No. 5,481,178, which is incorporated herein by reference. This switching regulator circuit 200 includes a push-pull switch 201, a driver circuit 203, an output circuit 205, and a control circuit 207.
The push-pull switch 201 which includes two synchronously-switched power MOSFETs 211 (p-channel), and 213 (n-channel) stacked in series between the rail of voltage supply VIN and ground. Power MOSFETs 211 and 213 are used to alternately supply current to output circuit 205 which includes inductor 215 and output capacitor 217. In order to supply the alternating current, power MOSFETs 211 and 213 are respectively driven by P-channel driver 219 and N-channel driver 221.
The control circuit 207 allows push-pull switch 201 to go into a state of operation where both power MOSFETs 211, 213 are simultaneously OFF under conditions where the output voltage VOUT can be maintained substantially at a regulated voltage by output capacitor 217. The ability of push-pull switch 201 to go into such a "sleep mode" is in contrast to other conventional regulator circuits where one of the two power MOSFETs 211, 213 is substantially ON at all times.
When the output voltage falls below the regulated voltage in such a mode, control circuit 207 is adapted to briefly turn push-pull switch 201 on to recharge the output capacitor 217 back to a voltage level in excess of the regulated voltage.
Although the "sleep mode" feature of conventional switching circuit reduces the regulator circuit power consumption since push-pull switch 201 does not dissipate power or allow power to be pulled from load RL to ground in "sleep mode," this switching regulator circuit 200 has disadvantages. Similar to the other conventional switching regulator circuit 100, this switching regulator circuit 200 also requires a very large switch so that when the switch is open, the resistance is close to zero (no DC loss). Thus, a lot of power is still consumed driving the gate of the large switch when switching it on and off, even if only a small pulse of current is needed to maintain the output voltage. Also, this conventional switching regulator 200 still has large transients associated with the switching operation which can cause crosstalk problems.
Another conventional power supply is a switched capacitor power supply. As illustrated in FIG. 3, the switched capacitor power supply circuit 300 includes a charge pump 301, an output terminal 313, an output capacitor 315, a sensing circuit 305 and a control circuit 307. The components of the switched capacitor power supply circuit 300 operate to provide a regulated output voltage Vout at output terminal 313.
The charge pump 301 comprises a variable capacitor 303 and a plurality of switches SW1-SW4. The switches SW1-SW4, which are represented by N-channel FETs, turn ON at logic high level and are controlled by complementary and non-overlapping clock signals CLK 20 and CLK' (CLK bar) 20', which provide a triggering source.
The charge pump 301, supplied by a voltage supply VDD, operates in a two-stage switched mode to provide an amplified voltage at the output terminal 313. In a first phase of the operation of charge pump 301, the clock signal CLK' 20' is at a logic high level and the charge pump 301 is in a charging state, i.e., the variable capacitor 303 is being charged to voltage supply VDD through switches SW2 and SW3.
Then, in a second phase of the operation of charge pump 301, the switched capacitor voltage supply circuit 300 is switched such that the voltage supply VDD and variable capacitor 303 are connected in series so as to create an amplified voltage at the output terminal 313. Thus, when clock signal CLK 20 is at a logic high level, the charge pump 301 is in a discharging state, i.e., the variable capacitor 303 is providing energy to the output terminal 313 through switches SW1 and SW4.
The output capacitor 315 connects across output terminal 313 to a ground reference and provides energy to a load (not shown). Depending upon the energy requirements of the load, the output capacitor 315 may be slightly discharged or greatly discharged. To regulate the output to a selected voltage, the output capacitor 315 must be recharged during clock signal CLK 20. The energy needed to recharge the output capacitor 315 will be dependent upon the amount of energy it needs to supply. Thus, the control circuit 307 adjusts the capacitance of the variable capacitor 303 based on the energy needed.
In operation, the sensing circuit 305 senses an output voltage produced by the charge pump 301. When the voltage at the output terminal 313 is below a threshold, the sensing circuit 305 senses such, sends a signal to the control circuit 307, and the control circuit 307 increases the capacitance of the variable capacitor 303. As a result, additional charge is provided by the variable capacitor 303 and the voltage at the output terminal 313 increases. When the voltage at the output terminal 313 is above the threshold, the sensing circuit 305 senses such, sends a signal to the control circuit 307, and the control circuit 307 reduces the capacitance of the variable capacitor 303. As a further result, less charge is provided by the variable capacitor 303 and the voltage at the output terminal 313 decreases. Hence, by changing the capacitance of the variable capacitor 303, the output voltage is regulated to a relationship between the variable capacitor 303 and an output capacitor 315.
The switched capacitor power supply circuit 300 also has several disadvantages. Similar to the conventional switching regulator circuits 100, 200, the charge pump 301 requires power MOSFET switches SW1-SW4. Therefore, the switched capacitor power supply circuit 300 experiences similar power consumption problems.
In view of the foregoing, it would be desirable to provide a high efficiency switching power supply circuit. It would also be desirable to provide a control circuit and method for maintaining high efficiency over broad current ranges, including low output currents, in a switching power supply circuit.